About the PRACE Cracow code porting workshop

Academic Computer Center CYFRONET AGH, in Krakow, Poland organizes a code porting workshop within the framework of PRACE project. PRACE (Partnership for Advanced Computing in Europe) prepares the creation of a persistent pan-European HPC service, consisting of several tier-0 centres providing European researchers with access to capability computers and forming the top level of the European HPC ecosystem. The workshop will be held on 14-16 October in Cracow, Poland and will be colocated with the Cracow Grid Workshop 2009 .

This workshop will be focused on some specific aspects of NEC and BlueGene HPC solutions by renowned experts in the area. It is addressed to researchers and students from Europe who are interested in the state of the art HPC infrastructures and practical introduction into porting applications to them. The maximum number of participants in this event is limited to 50 people.

Registration will be open up to October 4th, 2009. The workshop attentandance is free of charge, however the attendees have to cover their travel and lodging in Cracow. The first day of the workshop will provide some introductory talks into the subject and the next 2 days will hold the actual workshop. First half of each day will be dedicated to one machine and the second to other so that on the second day the attendees will have some chance to discover differences between these systems.

The workshop attendees will have a chance to have a hands on experience with programming on HPC systems including BlueGene/P at FZJ and NEC at HRLS and the attendees will recieve accounts on these machines which will be valid during the workshop sessions. The particpants will have a chance to get experience with code porting on real machines during the workshops sessions:

• IBM BlueGene/P in FZJ Julich - The IBM BlueGene/P (BG/P) installation at the Forschungszentrum Julich (FZJ), named jugene, is one of the six PRACE petascale prototypes. As this architecture significantly differs from general purpose architectures, optimal code porting is a challenging task. The aim of this workshop's part will be to introduce the BG/P architecture, the main features and the usage model at FZJ. To illustrate the presented topics, the participants will be able to use jugene during the workshop in the hands-on sessions. The main focus in these sessions will be the general usage, utilization of the double-hummer unit, i.e. single core performance, as well as the 3D torus network.
• NEC SX-9 in HRLS Stuttgart - The NEC SX9 is the latest incarnation of the NEC SX series and is the only remaining traditional large vector system for HPC on the market today. It provides an amazing system with important features. These features are briefly presented to provide a basic impression of this system. The participants will have a chance to work on this powerful vector processor achieving floating point peak performance of 102.4 GFLOPs. As this is a unique feature in this system and yields the largest differences to more common hardware architectures.

Presenters:

Lukas Arnold - received his Diploma in Computational Physics in 2005 and PhD in theoretical Plasma Physics from Ruhr-University Bochum, Germany in 2009. Since then he is a research scientist in the Simulation Laboratory Plasma Physics at the Institute for Advanced Simulation, FZJ, Germany. His PRACE activities are mainly the machine (WP5) and application (WP6) benchmarking as well as the compilation of the PRACE application benchmark suite.

Kamil Iskra - received his M.S. in computer science from AGH University of Science and Technology in Cracow, Poland in 1999. In 1999-2000 he was a scientific programmer at the University of Amsterdam, Netherlands, where he worked on task migration for parallel applications. He got his Ph.D. in computer science from the University of Amsterdam in 2005, in the area of parallel discrete event simulation. In 2005 he joined Argonne National Laboratory in the US, first as a postdoctoral researcher, and, since 2008, as an assistant computer scientist. He works on operating systems and I/O forwarding infrastructure for massively parallel machines.

Harald Klimach - received a Diploma in 2005 from University of Stuttgart. Since then he is working in DEISA in a Joint Research Activity on coupled computations, by now working in user application support and application benchmarking. Helped in building the HLRS Fortran Course. Since January 2008 also working in PRACE, mainly in application benchmarking.